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Author Topic: Trying some PCE stuff.  (Read 2 times)
KingMike
Guest
« on: February 20, 2008, 09:29:55 pm »
So, I thought I'd test out hacking a PCE game (some simple puzzle game).

The only trouble I'm having at the moment is with HuGo Tracer.
Can't quite remember how to get g8z tracers to log a raw, unfiltered trace.

Also, is there anywhere a document describing the PCE-specific opcodes?
BBR/Si (branch if bit i is/not set?), CLA/CLX/CLY (clear A/X/Y. I'm guessing this is to zero A/X/Y?), TAI/TDD/TIA/TII/TIN (I know they're block transfer instructions, but what do they do?).
I realize TAM to TMA are used to write/read (respectively) bankswap registers, and if I'm reading stuff right CSL/CSH change the clock speed.
dshadoff
Guest
« Reply #1 on: February 20, 2008, 09:55:17 pm »
Quote from: KingMike on February 20, 2008, 09:29:55 pm
So, I thought I'd test out hacking a PCE game (some simple puzzle game).

The only trouble I'm having at the moment is with HuGo Tracer.
Can't quite remember how to get g8z tracers to log a raw, unfiltered trace.

Also, is there anywhere a document describing the PCE-specific opcodes?
BBR/Si (branch if bit i is/not set?), CLA/CLX/CLY (clear A/X/Y. I'm guessing this is to zero A/X/Y?), TAI/TDD/TIA/TII/TIN (I know they're block transfer instructions, but what do they do?).
I realize TAM to TMA are used to write/read (respectively) bankswap registers, and if I'm reading stuff right CSL/CSH change the clock speed.

OK, first... I'd recommend that you use Mednafen instead of HuGo - Mednafen has superceded it by a lot.

For documentation... start with this:
http://www.emu-docs.org/PC%20Engine/pce_doc/

The CPU doc explains all of the opcodes (I think) - you can just gloss over the ones you already recognize (the cycle timings might be a bit different than on other machines though).

And your guesses on what they do (in general terms anyway) are correct.
BBR/BBS - check the nth bit of a ZP location and branch
CLA/X/Y - clear A/X/Y (without upsetting the flags)
TAI, etc. - transfer ('D' = with decrement, 'I' = with increment, and 'A' = alternating - for 16-bit mem-mapped ports.  So TIA copies from an area of memory through a 16-bit port like the video processor).
TAM = transfer from Acc to MMR.  The operand is a bitmap indicating which of the 8 MMRs to set.  Same idea for TMA.
CSH = set clock to 7.16 MHz ; CSL = set it to 1.78MHz

You'll probably want doc's on the video processor and other hardware next... you'll find it in the same place above.
Actually you can download the whole doc's as an archive: http://www.emu-docs.org/PC%20Engine/pce_doc.zip

Any more questions, I got answers.
Nightcrawler
Guest
« Reply #2 on: February 21, 2008, 09:14:07 am »
Mednafen and that document package should be added to the site (it doesn't look like either are here) so the next time someone has a question or issue like this, we don't have to hope dshadoff comes around to answer it again and the resources and tools are available here... I'd add them right now if I had the knowledge to write an adequate description about either, but I know nothing about Mednafen nor the quality or usefulness of content of the documentation.
RedComet
Guest
« Reply #3 on: February 21, 2008, 01:24:20 pm »
Quote from: Nightcrawler on February 21, 2008, 09:14:07 am
Mednafen and that document package should be added to the site (it doesn't look like either are here) so the next time someone has a question or issue like this, we don't have to hope dshadoff comes around to answer it again and the resources and tools are available here... I'd add them right now if I had the knowledge to write an adequate description about either, but I know nothing about Mednafen nor the quality or usefulness of content of the documentation.

http://www.romhacking.net/utils/461/ Tongue

As for the document package, I'll leave its submission to someone more knowledgeable than I.
Nightcrawler
Guest
« Reply #4 on: February 21, 2008, 03:46:19 pm »
Damn Multi-Platform option! I looked under Turbo Graphics 16 and CD instead. Would be great if multiple categories or platforms could be chosen. If I ever get smart enough to actually implement something like that, I will. But, being that we can't even make multiple contributers per project work right yet, it's doubtful for this year.  Sad
KingMike
Guest
« Reply #5 on: March 02, 2008, 03:52:55 pm »
Any particular way ROM bank mirroring works?

Looking into Momotaro Densetsu. 384KB = $30 ROM banks.
I'm looking into the graphics compression.
I see some data is loaded from bank $4A (beyond the actual ROM space). It seems that $4A * $2000 = $94000 in the physical memory map.
Doing a hex search, it seems that data is located around 0x54000 (bank $2A).

So, would I be correct in guessing (in absence of sufficient ROM space) bank $30+ is a mirror of bank $10+ ?
dshadoff
Guest
« Reply #6 on: March 02, 2008, 08:18:02 pm »
That's a split ROM - so it's not contiguous memory.

In this case, A20 is used as the ROM select, and A19 selects which ROM chip.

So the memory map goes like this:
bank $00-$1f = first 256KB (2Mb) of the ROM
bank $20-$3f = first 256KB (2Mb) of the ROM, echoed

bank $40-$4f = last 128KB (1Mb) of the ROM
bank $50-$5f = last 128KB (1Mb) of the ROM, echoed
bank $60-$6f = last 128KB (1Mb) of the ROM, echoed
bank $70-$7f = last 128KB (1Mb) of the ROM, echoed

Well, the game probably trusts only that $00-$1F and $40-$4F are in use; anything else is assumption.


I think I looked at this game once, and saw that the text was somehow compressed (but I could be wrong - I might have looked at a different Momotarou game - there are like 6 or 7 of them on the platform I think).  Have you found any text yet ?
tomaitheous
Guest
« Reply #7 on: March 02, 2008, 08:25:34 pm »
 And there's the develo book - http://pcedev.net/docs/DeveloA.pdf . Useful for opcode list and timings. Bonk had the exact same mirroring setup. Not sure why they bother to access the rom in a mirrored area since there's no benefit to it. Also, you can ask questions over at #utopiasoft on efnet. Obsessed PCE coders tend to hang out there  Wink
KingMike
Guest
« Reply #8 on: March 02, 2008, 10:25:31 pm »
Quote from: dshadoff on March 02, 2008, 08:18:02 pm
That's a split ROM - so it's not contiguous memory.

In this case, A20 is used as the ROM select, and A19 selects which ROM chip.

So the memory map goes like this:
bank $00-$1f = first 256KB (2Mb) of the ROM
bank $20-$3f = first 256KB (2Mb) of the ROM, echoed

bank $40-$4f = last 128KB (1Mb) of the ROM
bank $50-$5f = last 128KB (1Mb) of the ROM, echoed
bank $60-$6f = last 128KB (1Mb) of the ROM, echoed
bank $70-$7f = last 128KB (1Mb) of the ROM, echoed

Well, the game probably trusts only that $00-$1F and $40-$4F are in use; anything else is assumption.


I think I looked at this game once, and saw that the text was somehow compressed (but I could be wrong - I might have looked at a different Momotarou game - there are like 6 or 7 of them on the platform I think).  Have you found any text yet ?





Thanks for the info.
The specific title is Momotarou Densetsu Turbo (port of Momotarou Densetsu 1).
I haven't checked the text yet.
The only other version I looked at was the NES version (that version stored text using 7 bits per character).
(at the PS1 version, but I believe it was actually a remake of MD2, despite being called simply "Momotarou Densetsu")
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