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Topic: NES: Finding Text Routines the Visual Way (Read 1539 times)
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tomaitheous
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« Reply #15 on: October 31, 2006, 01:44:08 pm » |
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Ahhhh, I didn't realize that - must be an NES 2A03 problem. I'm usually in Huc6280 (w65c02s) thinking mode.
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Disch
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« Reply #16 on: October 31, 2006, 09:41:28 pm » |
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Yeah -- it's just an NES thing. Other 6502 systems I'm aware of have a D mode just fine. Just one of the NES quirks.  |
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hippiejake
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« Reply #17 on: November 01, 2006, 02:11:02 am » |
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I wouldn't call any of those three obscure. [...] BNE (Branch not equal) is a VERY common one.  I don't know [much] about assembly
There you have it. Glad you like! Is there anything in particular you'd like to see beyond this?
Perhaps an explanation of cracking some basic compression with a relatively simple format? That'd be nice.  |
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Ryusui
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« Reply #18 on: November 01, 2006, 02:25:03 am » |
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It's easy stuff, as long as you know what both the compressed and uncompressed material looks like. It's sorta like what cryptographers call a "plaintext attack": basically, you step through the code, noting the compressed data as it's read, and what's done to it before the decompressed data is written to memory. You'll need to either know or be able to look up every instruction, as well as all the CPU and hardware registers. It's no good knowing that data is getting written to $2118 without knowing that $2118 is a VRAM write...
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hippiejake
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« Reply #19 on: November 01, 2006, 02:33:30 am » |
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It's no good knowing that data is getting written to $2118 without knowing that $2118 is a VRAM write...
I thought $2007 was a VRAM write... *confused* And sure, it's easy for you. My mom can't do HTML. Now that's some easy stuff. o.0 |
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KingMike
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« Reply #20 on: November 01, 2006, 09:58:26 am » |
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On the NES, you write the high byte, then low byte to $2006, then data to $2007.
On the SNES, you write the 2-byte VRAM address/2 to $2116 (something to do with the SNES actually using 2 chips to store VRAM data), then the data to $2118.
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creaothceann
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« Reply #21 on: November 01, 2006, 10:32:04 am » |
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(something to do with the SNES actually using 2 chips to store VRAM data)
Yep. This also means that internally, Mode7 graphics are not interleaved. One chip stores the tilemap, the other one the tiles. Super Sleuth emulates that... </derailment> |
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Nightcrawler
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« Reply #22 on: November 01, 2006, 01:12:36 pm » |
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I hate to aid in derailment, but I must clarify on the SNES VRAM chips.
There are two chips. They are both hooked up to the SAME address lines. When you set an address in $2116, BOTH chips see that. Now, when you write to $2118, it goes to one chip and when you write to $2119 it goes to the second. If you write a 16-bit value, it's the same thing, but it's transparent to you that there are two chips.
So, THAT is why valid VRAM address can only range from 0-7fff even though there is 64K of VRAM. There are two 32K chips that share the same 0-7fff range of addresses. So, the effective VRAM range does end up going from 0-ffff. So to access VRAM address 0x8000, you'll actually want to set $2116 to $4000. That will allow $2118 and $2119 to effectively write to 0x8000 and 0x8001.
So that's how it works. You can generally deal with VRAM in effective terms until you have to write to $2116, then just divide by two.
This is a stumbling block that many people get caught with at first.
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tomaitheous
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« Reply #23 on: November 01, 2006, 07:27:31 pm » |
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This is a stumbling block that many people get caught with at first.
It's easy to explain it as 32kw instead of 64kb. I assume the tile address in the tile map are word aligned as well (even offsets)? Sounds like the ram is interleaved as two 8bit wide segments. I remember back in the day the early 486 mother boards had 4 8bit wide simm slots interleaved to make up the 32bit wide bus. Back to the topic of tutorials, is there an intermediate/advanced level assembly docs in the database for optimizing 6502/65c02/65816 code for speed or size? There isn't a lot of info for PCE and PCE-CD hacking, so I'll write some introduction and intermediate docs if there's any interest. |
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creaothceann
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« Reply #24 on: November 01, 2006, 07:34:17 pm » |
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This is a stumbling block that many people get caught with at first.
It's easy to explain it as 32kw instead of 64kb. ... as long as you also explain what "32kw" means. "Word" means to me that two bytes are related in function. "Interleaved" is just the opposite. |
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tomaitheous
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« Reply #25 on: November 01, 2006, 08:08:45 pm » |
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If the bus is interleaved(two 8bit ICs) and transparent to the user, the it's explained as "word" base addressing instead of byte based. I'm not expertly versed in the SNES PPU, but it sounds like it's setup like the PCE/SGX - being the graphic processing unit and memory uses word base read/write/addressing. Vram address register is 0-$7FFF (32kwords)
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RedComet
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« Reply #26 on: November 10, 2006, 06:18:31 pm » |
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Glad you like! Is there anything in particular you'd like to see beyond this?
Perhaps an explanation of cracking some basic compression with a relatively simple format? That'd be nice. That's do-able. Do you have something specific? RLE? Or something more text-based like dictionary and/or dte? I've been meaning to update my DTE doc to be more specific. |
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